File: GPCA_SW_Logical_Architecture.h

    1   /*
    2    * Code generation for system model 'GPCA_SW_Logical_Architecture'
    3    * For more details, see corresponding source file GPCA_SW_Logical_Architecture.c
    4    *
    5    */
    6   #ifndef RTW_HEADER_GPCA_SW_Logical_Architecture_h_
    7   #define RTW_HEADER_GPCA_SW_Logical_Architecture_h_
    8   #ifndef GPCA_SW_Logical_Architecture_COMMON_INCLUDES_
    9   # define GPCA_SW_Logical_Architecture_COMMON_INCLUDES_
   10   #include <string.h>
   11   #include "rtwtypes.h"
   12   #include "rtw_continuous.h"
   13   #include "rtw_solver.h"
   14   #endif                                 /* GPCA_SW_Logical_Architecture_COMMON_INCLUDES_ */
   15   
   16   #include "GPCA_SW_Logical_Architecture_types.h"
   17   
   18   /* Child system includes */
   19   #include "Top_Level_Mode_Functional.h"
   20   #include "System_Monitor_Functional.h"
   21   #include "SYS_STATS_Functional.h"
   22   #include "Logging_Functional.h"
   23   #include "INFUSION_MGR_Functional.h"
   24   #include "CONFIG_Functional.h"
   25   #include "ALARM_Functional.h"
   26   
   27   /* Block signals for model 'GPCA_SW_Logical_Architecture' */
   28   typedef struct {
   29     Config_Outputs BusConversion_InsertedFor_SYSTEM_STATUS_at_inport_;
   30     Config_Outputs CONFIGURATION;        /* '<Root>/CONFIGURATION' */
   31     Device_Sensor_Inputs BusConversion_InsertedFor_SYSTEM_STATUS_at_inpor_a;
   32     Device_Configuration_Inputs BusConversion_InsertedFor_SYSTEM_STATUS_at_inpor_l;
   33     Infusion_Manager_Outputs BusConversion_InsertedFor_SYSTEM_STATUS_at_inpor_i;
   34     Infusion_Manager_Outputs INFUSION_MANAGER;/* '<Root>/INFUSION_MANAGER' */
   35     Top_Level_Mode_Outputs TOP_LEVEL_MODE;/* '<Root>/TOP_LEVEL_MODE' */
   36     Top_Level_Mode_Outputs BusConversion_InsertedFor_SYSTEM_STATUS_at_inpor_d;
   37     System_Monitor_Output SYSTEM_MONITOR;/* '<Root>/SYSTEM_MONITOR' */
   38     Log_Output LOGGING;                  /* '<Root>/LOGGING' */
   39     Alarm_Outputs ALARM;                 /* '<Root>/ALARM' */
   40     uint8_T Patient_ID;
   41     uint8_T Drug_Name;
   42     uint8_T Drug_Concentration;
   43     uint8_T Infusion_Total_Duration;
   44     uint8_T VTBI_Total;
   45     uint8_T Flow_Rate_Basal;
   46     uint8_T Flow_Rate_Intermittent_Bolus;
   47     uint8_T Duration_Intermittent_Bolus;
   48     uint8_T Interval_Intermittent_Bolus;
   49     uint8_T Flow_Rate_Patient_Bolus;
   50     uint8_T Duration_Patient_Bolus;
   51     uint8_T Lockout_Period_Patient_Bolus;
   52     uint8_T Max_Number_of_Patient_Bolus;
   53     uint8_T Flow_Rate_KVO;
   54     uint8_T Entered_Reservoir_Volume;
   55     uint8_T Reservoir_Volume;
   56     uint8_T Configured;
   57     uint8_T Error_Message_ID;
   58     uint8_T Log_Message_ID;
   59     uint8_T Config_Timer;
   60     uint8_T Config_Mode;
   61     uint8_T Commanded_Flow_Rate;
   62     uint8_T Current_System_Mode;
   63     uint8_T Log_Message_ID_e;
   64     uint8_T Actual_Infusion_Duration;
   65     uint8_T Log;
   66     boolean_T Request_Config_Type;
   67     boolean_T Request_Confirm_Infusion_Initiate;
   68     boolean_T Request_Patient_Drug_Info;
   69     boolean_T Request_Infusion_Info;
   70     boolean_T New_Infusion;
   71     boolean_T Logging_Failed;
   72     boolean_T System_Monitor_Failed;
   73   } B_GPCA_SW_Logical_Architecture_c_T;
   74   
   75   /* Block states (auto storage) for model 'GPCA_SW_Logical_Architecture' */
   76   typedef struct {
   77     uint8_T UnitDelay_1_DSTATE;          /* '<Root>/Unit Delay' */
   78     uint8_T UnitDelay_2_DSTATE;          /* '<Root>/Unit Delay' */
   79     uint8_T UnitDelay_4_DSTATE;          /* '<Root>/Unit Delay' */
   80     uint8_T UnitDelay_5_DSTATE;          /* '<Root>/Unit Delay' */
   81     uint8_T UnitDelay3_1_DSTATE;         /* '<Root>/Unit Delay3' */
   82     uint8_T UnitDelay1_1_DSTATE;         /* '<Root>/Unit Delay1' */
   83     uint8_T UnitDelay1_2_DSTATE;         /* '<Root>/Unit Delay1' */
   84     uint8_T UnitDelay1_3_DSTATE;         /* '<Root>/Unit Delay1' */
   85     uint8_T UnitDelay1_4_DSTATE;         /* '<Root>/Unit Delay1' */
   86     uint8_T UnitDelay1_5_DSTATE;         /* '<Root>/Unit Delay1' */
   87     uint8_T UnitDelay1_6_DSTATE;         /* '<Root>/Unit Delay1' */
   88     uint8_T UnitDelay1_7_DSTATE;         /* '<Root>/Unit Delay1' */
   89     uint8_T UnitDelay1_8_DSTATE;         /* '<Root>/Unit Delay1' */
   90     uint8_T UnitDelay1_9_DSTATE;         /* '<Root>/Unit Delay1' */
   91     uint8_T UnitDelay1_10_DSTATE;        /* '<Root>/Unit Delay1' */
   92     uint8_T UnitDelay1_11_DSTATE;        /* '<Root>/Unit Delay1' */
   93     uint8_T UnitDelay1_12_DSTATE;        /* '<Root>/Unit Delay1' */
   94     uint8_T UnitDelay1_13_DSTATE;        /* '<Root>/Unit Delay1' */
   95     uint8_T UnitDelay1_14_DSTATE;        /* '<Root>/Unit Delay1' */
   96     uint8_T UnitDelay1_15_DSTATE;        /* '<Root>/Unit Delay1' */
   97     uint8_T UnitDelay1_16_DSTATE;        /* '<Root>/Unit Delay1' */
   98     uint8_T UnitDelay1_17_DSTATE;        /* '<Root>/Unit Delay1' */
   99     uint8_T UnitDelay1_18_DSTATE;        /* '<Root>/Unit Delay1' */
  100     uint8_T UnitDelay1_23_DSTATE;        /* '<Root>/Unit Delay1' */
  101     uint8_T UnitDelay1_24_DSTATE;        /* '<Root>/Unit Delay1' */
  102     uint8_T UnitDelay1_25_DSTATE;        /* '<Root>/Unit Delay1' */
  103     boolean_T UnitDelay_3_DSTATE;        /* '<Root>/Unit Delay' */
  104     boolean_T UnitDelay2_1_DSTATE;       /* '<Root>/Unit Delay2' */
  105     boolean_T UnitDelay3_2_DSTATE;       /* '<Root>/Unit Delay3' */
  106     boolean_T UnitDelay1_19_DSTATE;      /* '<Root>/Unit Delay1' */
  107     boolean_T UnitDelay1_20_DSTATE;      /* '<Root>/Unit Delay1' */
  108     boolean_T UnitDelay1_21_DSTATE;      /* '<Root>/Unit Delay1' */
  109     boolean_T UnitDelay1_22_DSTATE;      /* '<Root>/Unit Delay1' */
  110     MdlrefDW_Top_Level_Mode_Functional_T TOP_LEVEL_MODE_DWORK1;/* '<Root>/TOP_LEVEL_MODE' */
  111     MdlrefDW_SYS_STATS_Functional_T SYSTEM_STATUS_DWORK1;/* '<Root>/SYSTEM_STATUS' */
  112     MdlrefDW_ALARM_Functional_T ALARM_DWORK1;/* '<Root>/ALARM' */
  113     MdlrefDW_CONFIG_Functional_T CONFIGURATION_DWORK1;/* '<Root>/CONFIGURATION' */
  114     MdlrefDW_INFUSION_MGR_Functional_T INFUSION_MANAGER_DWORK1;/* '<Root>/INFUSION_MANAGER' */
  115     MdlrefDW_Logging_Functional_T LOGGING_DWORK1;/* '<Root>/LOGGING' */
  116     MdlrefDW_System_Monitor_Functional_T SYSTEM_MONITOR_DWORK1;/* '<Root>/SYSTEM_MONITOR' */
  117   } DW_GPCA_SW_Logical_Architecture_f_T;
  118   
  119   /* Real-time Model Data Structure */
  120   struct tag_RTM_GPCA_SW_Logical_Architecture_T {
  121     const char_T **errorStatus;
  122   };
  123   
  124   typedef struct {
  125     B_GPCA_SW_Logical_Architecture_c_T rtb;
  126     DW_GPCA_SW_Logical_Architecture_f_T rtdw;
  127     RT_MODEL_GPCA_SW_Logical_Architecture_T rtm;
  128   } MdlrefDW_GPCA_SW_Logical_Architecture_T;
  129   
  130   /* Model reference registration function */
  131   extern void GPCA_SW_Logical_Architecture_initialize(const char_T
  132     **rt_errorStatus, RT_MODEL_GPCA_SW_Logical_Architecture_T *const
  133     GPCA_SW_Logical_Architecture_M, B_GPCA_SW_Logical_Architecture_c_T *localB,
  134     DW_GPCA_SW_Logical_Architecture_f_T *localDW);
  135   extern void GPCA_SW_Logical_Architecture_Init
  136     (DW_GPCA_SW_Logical_Architecture_f_T *localDW);
  137   extern void GPCA_SW_Logical_Architecture_Update
  138     (B_GPCA_SW_Logical_Architecture_c_T *localB,
  139      DW_GPCA_SW_Logical_Architecture_f_T *localDW);
  140   extern void GPCA_SW_Logical_Architecture(const Device_Sensor_Inputs
  141     *rtu_SENSOR_IN, const Device_Configuration_Inputs *rtu_CONST_IN, const
  142     Operator_Commands *rtu_OP_CMD_IN, const Drug_Database_Inputs *rtu_DB_IN, const
  143     Prescription_Inputs *rtu_PRES_IN, const Patient_Inputs *rtu_PATIENT_IN,
  144     GPCA_SW_Outputs *rty_GPCA_SW_OUT, B_GPCA_SW_Logical_Architecture_c_T *localB,
  145     DW_GPCA_SW_Logical_Architecture_f_T *localDW);
  146   
  147   /*-
  148    * The generated code includes comments that allow you to trace directly
  149    * back to the appropriate location in the model.  The basic format
  150    * is <system>/block_name, where system is the system number (uniquely
  151    * assigned by Simulink) and block_name is the name of the block.
  152    *
  153    * Use the MATLAB hilite_system command to trace the generated code back
  154    * to the model.  For example,
  155    *
  156    * hilite_system('<S3>')    - opens system 3
  157    * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
  158    *
  159    * Here is the system hierarchy for this model
  160    *
  161    * '<Root>' : 'GPCA_SW_Logical_Architecture'
  162    */
  163   #endif                                 /* RTW_HEADER_GPCA_SW_Logical_Architecture_h_ */
  164